Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 126

IC ENCORE XP MCU FLASH 8K 28SOIC

Z8F083ASJ020EG

Manufacturer Part Number
Z8F083ASJ020EG
Description
IC ENCORE XP MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F083ASJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
269-4558-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F083ASJ020EG
Manufacturer:
Zilog
Quantity:
363
Table 70. Flash Control Register (FCTL)
Flash Control Register Definitions
.
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
Flash Control Register
Flash Status Register
W
7
0
routines are factory programmed and cannot be altered by you. The NVDS operation is
described in detail. See
The NVDS routines are triggered by a user code: CALL into Zilog memory. Code
executing from Zilog memory must be able to read and write other locations within Zilog
memory. User code must not be able to read or write Zilog memory.
The Flash controller must be unlocked using the Flash control register before
programming or erasing the Flash memory. Writing the sequence
to the Flash control register unlocks the Flash controller. When the Flash controller is
unlocked, the Flash memory is enabled for mass erase or page erase by writing the
appropriate enable command to the FCTL. Page erase applies only to the active page
selected in Flash page select register. Mass erase is enabled only through the On-Chip
Debugger. Writing an invalid value or an invalid sequence returns the Flash controller to
its Locked state. The write-only Flash control register shares its Register File address with
the read-only flash status register.
FCMD—Flash command
73H = First unlock command
8CH = Second unlock command
95H = Page erase command (must be third command in sequence to initiate page erase)
63H = Mass erase command (must be third command in sequence to initiate mass erase)
5EH = Enable Flash sector protect register access
The Flash status register indicates the current state of the Flash controller. This register is
read at any time. The read-only Flash status register shares its Register File address with
the write-only Flash control register.
W
6
0
W
5
0
Non Volatile Data Storage
W
4
0
FCMD
FF8H
W
3
0
on page 129.
Z8 Encore!
W
2
0
Product Specification
73H 8CH
W
1
0
®
F083A Series
, sequentially,
Flash Memory
W
0
0
114

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