Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 43
Z8F083ASJ020EG
Manufacturer Part Number
Z8F083ASJ020EG
Description
IC ENCORE XP MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Datasheet
1.Z8F083ASJ020EG.pdf
(256 pages)
Specifications of Z8F083ASJ020EG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Other names
269-4558-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F083ASJ020EG
Manufacturer:
Zilog
Quantity:
363
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®
Z8 Encore!
F083A Series
Product Specification
31
POR—Power-On Reset indicator
This bit is set to 1 if a POR event occurs and is reset to 0, if a WDT time-out or Stop Mode
Recovery occurs. Reading this register also resets this bit to 0.
STOP—Stop Mode Recovery indicator
This bit is set to 1 if a Stop Mode Recovery occurs. If the STOP and WDT bits are both set
to 1, the Stop Mode Recovery occurs because of a WDT time-out. If the STOP bit is 1 and
the WDT bit is 0, the Stop Mode Recovery is not caused by a WDT time-out. This bit is
reset by a POR or a WDT time-out that occurred while not in STOP mode. Reading this
register also resets this bit.
WDT—Watchdog Timer time-out indicator
This bit is set to 1 if a WDT time-out occurs. A POR resets this pin. A Stop Mode
Recovery from a change in an input pin also resets this bit. Reading this register resets this
bit. This read must occur before clearing the WDT interrupt.
EXT—External reset indicator
If this bit is set to 1, a reset initiated by the external RESET pin occurred. A POR or a Stop
Mode Recovery from a change in an input pin resets this bit. Reading this register resets
this bit.
Reserved—Must be 0.
PS026308-1207
Reset and Stop Mode Recovery
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