Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 87

• Manufacturer Part Number: Z8F083ASJ020EG
• Description: IC ENCORE XP MCU FLASH 8K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F083ASJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4558-5

PS026308-1207
and counting resumes. The INPCAP bit in TxCTL1 register is set to indicate, the timer
interrupt is caused by an input Capture event.
If no Capture event occurs, the timer counts up to 16-bit compare value stored in the timer
reload high and low byte registers. On reaching the reload value, the timer generates an
interrupt, the count value in the timer high and low byte registers is reset to
counting resumes. The INPCAP bit in TxCTL1 register is cleared to indicate the timer
interrupt is not caused by an input Capture event.
The steps for configuring a timer for CAPTURE RESTART mode and for initiating the
count are as follows:
1. Write to the timer control register to:
2. Write to the timer high and low byte registers to set the starting count value (typically
3. Write to the timer reload high and low byte registers to set the reload value.
4. Clear the timer PWM high and low byte registers to 0000H. This allows user software
5. Enable the timer interrupt, if appropriate, and set the timer interrupt priority by writing
6. Configure the associated GPIO port pin for the timer input alternate function.
7. Write to the timer control register to enable the timer and initiate counting.
In CAPTURE mode, the elapsed time between the timer start and the Capture event is
calculated using the following equation:
Capture Elapsed Time (s)
–
–
–
–
0001H
to determine if interrupts are generated by either a Capture event or a reload. If the
PWM high and low byte registers still contain 0000H after the interrupt, the interrupt
were generated by a reload.
to the relevant interrupt registers. By default, the timer interrupt is generated for both
input Capture and Reload events. You configure the timer interrupt to be generated
only at the input Capture event or the Reload event by setting TICONFIG field of the
TxCTL1 register.
Disable the timer.
Configure the timer for CAPTURE RESTART mode. Setting the mode also
involves writing to TMODEHI bit in TxCTL1 register.
Set the prescale value.
Set the capture edge (rising or falling) for the timer input.
).
=
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Capture Value Start Value
System Clock Frequency (Hz)
–
Z8 Encore!
Product Specification
Prescale
®
F083A Series
0001H
and
Timers
75