Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 170

IC ENCORE XP MCU FLASH 8K 28SOIC

Z8F083ASJ020EG

Manufacturer Part Number
Z8F083ASJ020EG
Description
IC ENCORE XP MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F083ASJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
269-4558-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F083ASJ020EG
Manufacturer:
Zilog
Quantity:
363
Assembly Language Syntax
eZ8 CPU Instruction Notation
PS026308-1207
For proper instruction execution, eZ8 CPU assembly language syntax requires that the
operands be written as ‘destination, source’. After assembly, the object code usually has
the operands in the order ‘source, destination’, but ordering is Opcode dependent. The
following instruction examples display the format of some basic assembly instructions and
the resulting object code produced by the assembler. This binary format must be followed
by users that prefer manual program coding or intend to implement their own assembler.
Example 1: If the contents of registers
43H
Table 97. Assembly Language Syntax Example 1
Example 2: In general, when an instruction format requires an 8-bit register address, the
address specify any register location in the range 0–255 or, using escaped mode
addressing, a working register R0–R15. If the contents of register
register R8 are added and the result is stored in
object code is:
Table 98. Assembly Language Syntax Example 2
See the device specific product specification to determine the exact Register File range
available. The Register File size varies, depending on the device type.
In the eZ8 CPU instruction summary and description sections, the operands, condition
codes, status flags, and address modes are represented by a notational shorthand that is
described in
Assembly Language
Code
Object Code
Assembly Language
Code
Object Code
, the assembly syntax and resulting object code is:
Table 99
on page
159.
ADD
04
ADD
04
43H
43H,
08
43H,
E8
and
43H
08H
08H
43
R8
43
, the assembly syntax and resulting
are added and the result is stored in
(ADD dst, src)
(OPC src, dst)
(ADD dst, src)
(OPC src, dst)
Z8 Encore!
Product Specification
43H
eZ8 CPU Instruction Set
and working
®
F083A Series
158

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