Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 142

• Manufacturer Part Number: Z8F083ASJ020EG
• Description: IC ENCORE XP MCU FLASH 8K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F083ASJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4558-5

Table 88. Write Status Byte
BITS
FIELD
DEFAULT
VALUE
PS026308-1207
Byte Read
Write routine (
working register R0. The bit fields of this status byte are defined in
code should pop the address and data bytes off the stack.
The write routine uses 16 bytes of stack space in addition to the two bytes of address and
data pushed by the user code. Sufficient memory must be available for this stack usage.
Because of the flash memory architecture, NVDS writes exhibit a non-uniform execution
time. In general, a write takes 136 s (assuming a 20 MHz system clock). For every 200
writes, however, a maintenance operation is necessary. In this rare occurrence, the write
takes up to 58 ms to complete. Slower system clock speeds result in proportionally higher
execution times.
NVDS byte writes to invalid addresses (those exceeding the NVDS array size) have no
effect. Illegal write operations have a 7 s execution time.
To read a byte from the NVDS array, user code must first push the address onto the stack.
User code issues a
the return from the sub-routine, the read byte resides in working register R0, and the read
status byte resides in working register R1. The bit fields of this status byte are defined in
Table
The read routine uses 16 bytes of stack space in addition to the one byte of address pushed
by the user code. Sufficient memory must be available for this stack usage.
7
0
Reserved—Must be 0.
FE—Flash Error
If Flash error is detected, this bit is set to 1.
IGADDR—Illegal address
When NVDS byte writes to invalid addresses (those exceeding the NVDS array size)
occur, this bit is set to 1.
WE—Write Error
A failure occurs during writing data into Flash. When writing data into a certain
address, a read back operation is performed. If the read back value is not the same as
the value written, this bit is set to 1.
89. Also, the user code should pop the address byte off the stack.
0x20B3
6
0
CALL
Reserved
). At the return from the sub-routine, the write status byte resides in
instruction to the address of the byte-read routine (
5
0
4
0
3
0
Z8 Encore!
FE
2
0
Product Specification
Non Volatile Data Storage
Table
IGADDR
®
1
0
88. Also, user
F083A Series
0x2000
WE
). At
0
0
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