UPSD3422E-40U6 STMicroelectronics, UPSD3422E-40U6 Datasheet - Page 297

• Manufacturer Part Number: UPSD3422E-40U6
• Description: MCU 8BIT 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3422E-40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 80KB (80K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5577 - BOARD EVAL USB POWER SWITCH497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4903

UPSD3422, UPSD3433, UPSD3434, UPSD3454
34.10
34.11
with an ACK. The host will resend the SETUP packet a number of times and if an ACK is
not received from the UPSD3400, the host will issue a USB reset and then enumerate it
again. Upon detecting a USB reset, the UPSD3400 firmware will reset and initialize the
USB SIE putting the hardware back into the reset/initialized state so that when the next
SETUP packet is received, the UPSD3400 will respond with an ACK to the host.
Impact on application
If this occurs during enumeration, the impact is minimal as the host will retry the
enumeration. If it happens after enumeration, the communication will break down between
the host application and the UPSD3400 and will need to be re-established after the
UPSD3400 is reset and enumerated again. In extremely noisy environments, the
UPSD3400 may not communicate well over USB with the host application.
Workaround
Revision A and B - None identified at this time.
MCU JTAG ID
Description
MCU JTAG ID changed to differentiate revision A from revision B silicon through the JTAG
port. The PSD JTAG ID remains the same.
Revision A MCU JTAG ID - 0451F041f
Revision B MCU JTAG ID - 1451F041h
Impact on application
There will be no impact on the application. The impact will be to JTAG production
programming equipment that may need to distinguish between revision A and B MCU silicon
if the firmware is different depending on the revision level.
Port 1 not 5-volt IO tolerant
Description
The port P1 is shared with the ADC module and as a result Port P1 is not 5 V tolerant.
Impact on application
5 V devices should not be connected to port P1.
Workaround
Revision A and B - Peripherals or GPIO that require 5-Volt IO tolerance should be mapped
to Port 3 or Port 4.
Important notes
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