UPSD3422E-40U6 STMicroelectronics, UPSD3422E-40U6 Datasheet - Page 63

• Manufacturer Part Number: UPSD3422E-40U6
• Description: MCU 8BIT 8032 64KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3422E-40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 80KB (80K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5577 - BOARD EVAL USB POWER SWITCH497-5518 - EVAL BOARD RFID READER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4903

UPSD3422, UPSD3433, UPSD3434, UPSD3454
Note:
If an interrupt flag is not cleared after servicing the interrupt, an unwanted interrupt will occur
upon exiting the ISR.
After the interrupt is serviced, the last instruction executed by the ISR is RETI. The RETI
informs the MCU that the ISR is no longer in progress and the MCU pops the top two bytes
from the stack and loads them into the PC. Execution of the interrupted program continues
where it left off.
An ISR must end with a RETI instruction, not a RET. An RET will not inform the interrupt
control system that the ISR is complete, leaving the MCU to think the ISR is still in progress,
making future interrupts impossible.
Table 17.
1. See USB interrupt flag registers UIF0-3.
Reserved 0 (high) 0063h
Interrupt
Overflow
Overflow
Overflow
Interrupt
Interrupt
External
External
Timer 0
Timer 1
Timer 2
source
UART0
UART1
or TX2
INT0
INT1
ADC
USB
PCA
SPI
Pin
I
2
C
12 (low) 004Bh
priority
Polling
Interrupt summary
10
11
1
2
3
4
5
6
7
8
9
Vector
000Bh
001Bh
002Bh
003Bh
005Bh
0003h
0013h
0023h
0053h
0033h
0043h INTR (S1STA.5)
addr
1 = Intr pending
0 = No interrupt
TEISF, RORISF,
TF2 (T2CON.7)
(SPISTAT[3:0])
(PCASTA[0:7])
Flag bit name
TF0 (TCON.5)
TF1 (TCON.7)
IE0 (TCON.1)
RI (SCON0.0)
TI (SCON0.1)
RI (SCON1.0)
TI (SCON1.1)
IE1 (TCON.3
OFVx, INTFx
(T2CON.6)
TISF, RISF
(ACON.7)
position)
(SFR.bit
AINTF
EXF2
–
–
(1)
hardware?
cleared by
Edge - Yes
Edge - Yes
Level - No
Level - No
Flag bit
auto-
Yes
Yes
Yes
Yes
No
No
No
No
No
No
–
0 = Intr Disabled
Enable bit name
1 = Intr Enabled
EADC (IEA.7)
EUSB (IEA.0)
EPCA (IEA.5)
ESPI (IEA.6)
EI
ES1 (IEA.4)
EX0 (IE.0)
ET0 (IE.1)
EX1 (IE.2)
ET1 (IE.3)
ES0 (IE.4)
ET2 (IE.5)
position)
(SFR.bit
2
C (IEA.1)
–
Interrupt system
Priority bit name
1= High Priority
0 = Low Priority
PUSB (IPA.0)
PPCA (IPA.5)
PADC (IPA.7)
PSPI (IPA.6)
PI
PS1 (IPA.4)
PX0 (IP.0)
PT0 (IP.1)
PX1 (IP.2)
PT1 (IP.3)
PS0 (IP.4)
PT2 (IP.5)
position)
(SFR.bit
2
C (IPA.1)
–
63/300