MC9S08QD4VSC Freescale Semiconductor, MC9S08QD4VSC Datasheet - Page 45

• Manufacturer Part Number: MC9S08QD4VSC
• Description: IC MCU 4K FLASH 256RAM 8-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08QD4VSC

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 4
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: S08QD
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 4
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08QD4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 256Byte
• # I/os (max): 4
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• For Use With: DEMO9S08QD4 - BOARD DEMO FOR MC9S08QD FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 4-7
Freescale Semiconductor
Reset
PRDIV8
DIVLD
Field
DIV
5:0
7
6
W
R
shows the appropriate values for PRDIV8 and DIV for selected bus frequencies.
DIVLD
Divisor Loaded Status Flag — When set, this read-only status flag indicates that the FCDIV register has been
written since reset. Reset clears this bit and the first write to this register causes this bit to become set regardless
of the data written.
0 FCDIV has not been written since reset; erase and program operations disabled for flash.
1 FCDIV has been written since reset; erase and program operations enabled for flash.
Prescale (Divide) Flash Clock by 8
0 Clock input to the flash clock divider is the bus rate clock.
1 Clock input to the flash clock divider is the bus rate clock divided by 8.
Divisor for Flash Clock Divider — The flash clock divider divides the bus rate clock (or the bus rate clock
divided by 8 if PRDIV8 = 1) by the value in the 6-bit DIV field plus one. The resulting frequency of the internal
flash clock must fall within the range of 200 kHz to 150 kHz for proper flash operations. Program/Erase timing
pulses are one cycle of this internal flash clock which corresponds to a range of 5 μs to 6.7 μs. The automated
programming logic uses an integer number of these pulses to complete an erase or program operation. See
Equation 4-1
0
7
200 kHz
150 kHz
8 MHz
4 MHz
2 MHz
1 MHz
f
Bus
= Unimplemented or Reserved
PRDIV8
and
(Binary)
PRDIV8
0
6
Equation
if PRDIV8 = 1 – f
0
0
0
0
0
0
Figure 4-5. Flash Clock Divider Register (FCDIV)
if PRDIV8 = 0 – f
Table 4-6. FCDIV Register Field Descriptions
MC9S08QD4 Series MCU Data Sheet, Rev. 6
Table 4-7. Flash Clock Divider Settings
4-2.
(Decimal)
0
5
DIV
39
19
9
4
0
0
FCLK
FCLK
= f
0
4
= f
Bus
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
150 kHz
f
FCLK
Bus
Description
÷ (8 × (DIV + 1))
÷ (DIV + 1)
3
0
Program/Erase Timing Pulse
(5 μs Min, 6.7 μs Max)
DIV
Chapter 4 Memory Map and Register Definition
6.7 μs
0
5 μs
5 μs
5 μs
5 μs
5 μs
2
0
1
Eqn. 4-1
Eqn. 4-2
0
0
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