ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 175

• Manufacturer Part Number: ST72F344K4T6
• Description: MCU 8BIT 16KB FLASH MEM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F344K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5611

ST72344xx ST72345xx
Note:
Figure 75. Transfer sequencing
Legend: S = Start, P = Stop, A = Acknowledge, NA = Non-acknowledge,
WF = WF event, WFx bit is set (with interrupt if ITWEx=1, after Stop or Restart conditions),
cleared by reading the I2C3SSR register while no communication is ongoing.
RF = RF event, RFx is set (with interrupt if ITREx=1, after Stop or Restart conditions),
cleared by reading the I2C3SSR register while no communication is ongoing.
BusyW = BusyW flag in the I2C3CR2 register set, cleared by software writing 0.
The I2C3S supports a repeated start (S
Figure 76. Byte write
Figure 77. Page write
Figure 78. Current address read
Figure 79. Random read (dummy write + restart + current address read)
Start
Start
Start
7-bit Slave receiver:
7-bit Slave transmitter:
S Address A
S Address A
Start
SA
SA
SA
W
W
Ack
WF
RF
Ack
SA
W
BA
Data1
Doc ID 12321 Rev 5
Data1
BA
Ack
Ack Start
A
R
A
r
) in place of a stop condition (P).
Ack
Data2
Data2
BA
Ack
SA
Data
A
A
Ack
Data
.....
.....
R Ack
Ack
DataN NA P
DataN A P
Data
Nack
Data
Data
Stop
Nack
On-chip peripherals
Ack
BusyW
Ack
Stop
Stop
Stop
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