ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 68

MCU 8BIT 16KB FLASH MEM 32-LQFP

ST72F344K4T6

Manufacturer Part Number
ST72F344K4T6
Description
MCU 8BIT 16KB FLASH MEM 32-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F344K4T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
34
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5611

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0
Power-saving modes
9.5
68/247
Halt mode recommendations
Active-halt mode
Active-halt mode is the lowest power consumption mode of the MCU with a real-time clock
available. It is entered by executing the ‘HALT’ instruction when MCC/RTC interrupt enable
flag (OIE bit in MCCSR register) is set and when the AWUEN bit in the AWUCSR register is
cleared (see
Table 23.
The MCU can exit Active-halt mode on reception of the RTC interrupt and some specific
interrupts (see
mode by means of a reset a 4096 or 256 CPU cycle delay occurs (depending on the option
byte). After the start up delay, the CPU resumes operation by servicing the interrupt or by
fetching the reset vector which woke it up (see
When entering Active-halt mode, the I[1:0] bits in the CC register are cleared to enable
interrupts. Therefore, if an interrupt is pending, the MCU wakes up immediately.
In Active-Halt mode, only the main oscillator and its associated counter (MCC/RTC) are
running to keep a wake-up time base. All other peripherals are not clocked except those
which get their clock supply from another clock generator (such as external or auxiliary
oscillator).
The safeguard against staying locked in Active-halt mode is provided by the oscillator
interrupt.
MCCSR OIE bit
Make sure that an external event is available to wake up the microcontroller from Halt
mode.
When using an external interrupt to wake up the microcontroller, reinitialize the
corresponding I/O as “Input Pull-up with Interrupt” before executing the HALT
instruction. The main reason for this is that the I/O may be wrongly configured due to
external interference or by an unforeseen logical condition.
For the same reason, reinitialize the level sensitiveness of each external interrupt as a
precautionary measure.
The opcode for the HALT instruction is 0x8E. To avoid an unexpected HALT instruction
due to a program counter failure, it is advised to clear all occurrences of the data value
0x8E from memory. For example, avoid defining a constant in ROM with the value
0x8E.
As the HALT instruction clears the interrupt mask in the CC register to allow interrupts,
the user may choose to clear all pending interrupt bits before executing the HALT
instruction. This avoids entering other peripheral interrupt routines after executing the
external interrupt routine corresponding to the wake-up event (reset or external
interrupt).
0
1
Power saving mode
Register description on page
Table 17: Interrupt mapping on page
Halt mode
Active-halt mode
Power saving mode entered when HALT instruction is executed
Doc ID 12321 Rev 5
72).
Figure
59) or a reset. When exiting Active-halt
31).
ST72344xx ST72345xx

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