ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 22

• Manufacturer Part Number: ST72F344K4T6
• Description: MCU 8BIT 16KB FLASH MEM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F344K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5611

Pin description
Table 3.
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is
2. It is mandatory to connect all available V
3. Pulled-up by hardware when not present on the package.
4. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to V
5. Internal weak pull-down.
22/247
27 1
28 2
29 5
30 6
31 7
32 8
-
-
-
-
-
-
Pin n°
merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating
interrupt input.
implemented).
10 11 PD3/AIN3
11 12 PD4/AIN4
12 13 PD5/AIN5
3
4
9
10 PD2/AIN2
2 PE1/RDI
3 PB0
4 PB1
5 PB2
6 PB3
7 PB4 (HS)
8 PD0/AIN0
9 PD1/AIN1
Device pin description (continued)
(3)
(3)
Pin name
DD
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
and V
Level
T
T
T
T
T
T
T
T
T
T
T
T
DDA
Doc ID 12321 Rev 5
HS X
pins to the supply voltage and all V
X
X
X
X
X
X
X
X
X
X
X
Input
X
X
X
X
X
X
ei2
ei2
ei2
ei3
ei0
ei2
(1)
Port
X
X
X
X
X
X
Output
X
X
X
X
X
X
X
X
X
X
X
X
X Port E1
X Port B0
X Port B1
X Port B2
X Port B3
X Port B4
X Port D0
X Port D1
X Port D2
X Port D3
X Port D4
X Port D5
function
SS
reset)
(after
Main
and V
ST72344xx ST72345xx
SSA
DD
SCI receive data in
ADC analog input 0
ADC analog input 1
ADC analog input 2
ADC analog input 3
ADC analog input 4
ADC analog input 5
Alternate function
pins to ground.
are not