ST72F344K4T6 STMicroelectronics, ST72F344K4T6 Datasheet - Page 57

• Manufacturer Part Number: ST72F344K4T6
• Description: MCU 8BIT 16KB FLASH MEM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F344K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F34X-SK/RAIS, ST7MDT40-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5611

ST72344xx ST72345xx
8.5
8.5.1
Figure 23. Nested interrupt management
Interrupt register description
CPU CC register interrupt bits
Reset value: 111x 1010 (xAh)
Bits 5, 3 = I1, I0 Software interrupt priority
These two bits indicate the current interrupt software priority.
Table 14.
1. TRAP and reset events can interrupt a level 3 program.
These two bits are set/cleared by hardware when entering in interrupt. The loaded value is
given by the corresponding bits in the interrupt software priority registers (ISPRx).
They can be also set/cleared by software with the RIM, SIM, HALT, WFI, IRET and
PUSH/POP instructions (see “Interrupt Dedicated Instruction Set” table).
Level 0 (main)
Level 1
Level 2
Level 3 (= interrupt disable
7
1
11 / 10
MAIN
RIM
Interrupt software priority
1
IT2
Priority
IT1
(1)
)
I1
IT4
Doc ID 12321 Rev 5
TRAP
IT4
H
Read/Write
IT0
IT3
Low
High
I0
IT1
Level
IT2
10
SOFTWARE
PRIORITY
LEVEL
N
MAIN
1
0
0
1
I1
3
3
2
1
3
3
3/0
Z
I1
0
1
0
1
1 1
1 1
0 0
0 1
1 1
1 1
Interrupts
I0
C
0
57/247
I0