M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 39

• Manufacturer Part Number: M38D59GCHP#U0
• Description: IC 740/38D5 MCU QZ-ROM 80LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38D59GCHP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, LED, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

38D5 Group
Rev.3.04
REJ03B0158-0304
Fig. 27 Structure of timer 1 to timer 4 related registers
b7
b7
b7
May 20, 2008 Page 37 of 134
b0
b0
b0
Timer 34 mode register
(T34M: address 0026
Timer 1234 mode register
(T1234M: address 0027
Timer 12 mode register
(T12M: address 0025
Timer 3 count stop bit
Timer 4 count stop bit
Timer 3 count source selection bit
Timer 4 count source selection bits
Timer 3 operating mode selection bit
Timer 4 operating mode selection bit
Not used (returns “0” when read)
T
T
Timer 3 output selection bit (P7
Timer 4 output selection bit (P7
Timer 2 write control bit
Timer 3 write control bit
Timer 4 write control bit
Not used (returns “0” when read)
0 : Count operation
1 : Count stop
0 : Count operation
1 : Count stop
0 : Frequency divider for Timer 3
1 : Underflow of Timer 2
b4b3
0 0 : Frequency divider for Timer 4
0 1 : Underflow of Timer 3
1 0 : Underflow of Timer 2
1 1 : f(X
0 : Timer mode
1 : PWM mode
0 : Timer mode
1 : PWM mode
0 : Start at “L” output
1 : Start at “H” output
0 : Start at “L” output
1 : Start at “H” output
0 : I/O port
1 : Timer 3 output
0 : I/O port
1 : Timer 4 output
0 : Write data to both timer latch and timer
1 : Write data to timer latch only
0 : Write data to both timer latch and timer
1 : Write data to timer latch only
0 : Write data to both timer latch and timer
1 : Write data to timer latch only
3OUT
4OUT
Timer 1 count stop bit
Timer 2 count stop bit
Timer 1 count source selection bits
Timer 2 count source selection bits
Timer 2 output selection bit (P7
T
b5b4
0 : Count operation
1 : Count stop
0 : Count operation
1 : Count stop
b3b2
0 0 : Frequency divider for Timer 1
0 1 : f(X
1 0 : Underflow of Timer Y
1 1 : Not available
0 0 : Underflow of Timer 1
0 1 : f(X
1 0 : Frequency divider for Timer 2
1 1 : Not available
0 : I/O port
1 : Timer 2 output
2OUT
0 : Start at “L” output
1 : Start at “H” output
output edge switch bit
output edge switch bit
output edge switch bit
IN
)
CIN
CIN
)
)
16
)
16
16
)
)
3
4
)
)
2
)
Note1: φSOURCE indicates the followings:
b7
b7
•X
•On-chip oscillator divided by 4 in the on-chip oscillator mode
•Sub-clock in the low-speed mode
IN
input in the frequency/2, 4, or 8 mode
b0
b0
Timer 1234 frequency division selection register
(PRE1234: address 0028
PWM01 register
(PWM01: address 0024
Timer 1 frequency division selection bits
Timer 2 frequency division selection bits
Timer 3 frequency division selection bits
Timer 4 frequency division selection bits
PWM0 set bits
PWM1 set bits
Not used (returns “0” when read)
b1b0
0 0 : 1/16 × φ SOURCE
0 1 : 1/1 × φ SOURCE
1 0 : 1/2 × φ SOURCE
1 1 : 1/256 × φ SOURCE
b3b2
0 0 : 1/16 × φ SOURCE
0 1 : 1/1 × φ SOURCE
1 0 : 1/2 × φ SOURCE
1 1 : 1/256 × φ SOURCE
b5b4
0 0 : 1/16 × φSOURCE
0 1 : 1/1 × φ SOURCE
1 0 : 1/2 × φ SOURCE
1 1 : 1/256 × φ SOURCE
b7b6
0 0 : 1/16 × φ SOURCE
0 1 : 1/1 × φ SOURCE
1 0 : 1/2 × φ SOURCE
1 1 : 1/256 × φ SOURCE
b1b0
0 0 : No extended
0 1 : Extended once in four periods
1 0 : Extended twice in four periods
1 1 : Extended three times in four periods
b3b2
0 0 : No extended
0 1 : Extended once in four periods
1 0 : Extended twice in four periods
1 1 : Extended three times in four periods
16
16
)
)
(1)