DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 703

• Manufacturer Part Number: DF2161BVTE10
• Description: MCU 3V 128K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2161BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 114
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2161BVTE10; HD64F2161BVTE10

Notes:
Program execution state
SLEEP instruction
SSBY = 1, PSS = 1,
DTON = 1, LSON = 0
After the oscillation
stabilization time
(STS2 to STS0), clock
switching exception
handling
When a transition is made between modes by means of an interrupt, the transition cannot be made
on interrupt source generation alone. Ensure that interrupt handling is performed after accepting the
interrupt request.
Always select high-speed mode before making a transition to watch mode or sub-active mode.
1.
2.
3.
NMI, IRQ0 to IRQ2, IRQ6, IRQ7, and WDT1 interrupts
NMI, IRQ0 to IRQ7, WDT0, WDT1, TMR0, and TMR1 interrupts
NMI, IRQ0 to IRQ2, IRQ6, and IRQ7 interrupts
SCK2 to
SCK0 are
0
High-speed mode
Subactive mode
Medium-speed
(main clock)
(main clock)
Reset state
(subclock)
mode
: Transition after exception processing
RES pin = High
SLEEP instruction
SSBY = 1, PSS = 1,
DTON = 1, LSON = 1
Clock switching
exception handling
SCK2 to
SCK0 are
not 0
Figure 25.1 Mode Transition Diagram
STBY pin = High
RES pin = Low
SLEEP instruction
External
interrupt *
Interrupt *
LSON bit = 0
SLEEP instruction
SLEEP
instruction
Interrupt *
Any interrupt
Interrupt *
LSON bit = 1
SLEEP
instruction
Rev. 3.00 Mar 21, 2006 page 647 of 788
SLEEP
instruction
3
1
2
1
Section 25 Power-Down Modes
SSBY = 0, LSON = 0
: Power-down mode
SSBY = 1,
PSS = 0, LSON = 0
SSBY = 0,
PSS = 1, LSON = 1
SSBY = 1,
PSS = 1, DTON = 0
Program halt state
STBY pin = Low
Subsleep mode
standby mode
standby mode
Watch mode
Sleep mode
(main clock)
(subclock)
(subclock)
Hardware
Software
REJ09B0300-0300