DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 196

IC H8S/2367 MCU FLASH 128QFP

DF2367VF33V

Manufacturer Part Number
DF2367VF33V
Description
IC H8S/2367 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2367VF33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Bus Controller (BSC)
Bit
10
9
8
7
Rev.6.00 Mar. 18, 2009 Page 136 of 980
REJ09B0050-0600
Bit Name
RMTS2
RMTS1
RMTS0
BE
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
DRAM Space Select
These bits designate DRAM space for areas 2
to 5.
When continuous DRAM space is set, it is
possible to connect large-capacity DRAM
exceeding 2 Mbytes per area. In this case, the
RAS signal is output from the CS2 pin.
000: Normal space
001: Normal space in areas 3 to 5
010: Normal space in areas 4 and 5
011: Reserved (setting prohibited)
100: Reserved (setting prohibited)
101: Reserved (setting prohibited)
110: Reserved (setting prohibited)
111: Continuous DRAM space in areas 2 to 5
Burst Access Enable
Selects enabling or disabling of burst access to
areas designated as DRAM space. DRAM
space burst access is performed in fast page
mode. When using EDO page mode DRAM, the
OE signal must be connected.
0: Full access
1: Access in fast page mode
DRAM space in area 2
DRAM space in areas 2 and 3

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