DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 550

IC H8S/2367 MCU FLASH 128QFP

DF2367VF33V

Manufacturer Part Number
DF2367VF33V
Description
IC H8S/2367 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2367VF33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 Programmable Pulse Generator (PPG)
11.3.3
NDRH, NDRL store the next data for pulse output. The NDR addresses differ depending on
whether pulse output groups have the same output trigger or different output triggers.
• NDRH
If pulse output groups 2 and 3 have the same output trigger, all eight bits are mapped to the same
address and can be accessed at one time, as shown below.
If pulse output groups 2 and 3 have different output triggers, upper 4 bits and lower 4 bits are
mapped to the different addresses as shown below.
Rev.6.00 Mar. 18, 2009 Page 490 of 980
REJ09B0050-0600
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
to
0
Bit Name
NDR15
NDR14
NDR13
NDR12
NDR11
NDR10
NDR9
NDR8
Bit Name
NDR15
NDR14
NDR13
NDR12
Next Data Registers H, L (NDRH, NDRL)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
All 1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Next Data Register 15 to 8
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
Description
Next Data Register 15 to 12
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
Reserved
These bits are always read as 1 and cannot be
modified.

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