DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 789

• Manufacturer Part Number: DF2367VF33V
• Description: IC H8S/2367 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2367VF33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
4
3 to 1 ⎯
Bit Name
FLER
Initial
Value
0
All 0
R/W
R
R
Description
Flash Memory Error
Indicates an error occurs during programming and
erasing flash memory. When FLER is set to 1, flash
memory enters the error protection state. This bit is
initialized at transition to a power-on reset or hardware
standby mode.
When FLER is set to 1, high voltage is applied to the
internal flash memory. To reduce the damage to flash
memory, the reset must be released after the reset
period of 100 μs which is longer than normal.
0: Flash memory operates normally
1: Indicates an error occurs during programming/erasing
•
•
•
•
Reserved
These bits are always read as 0. The write value should
always be 0.
Programming/erasing protection for flash memory
(error protection) is invalid.
[Clearing condition] At a power-on reset or in hardware
standby mode
flash memory.
Programming/erasing protection for flash memory
(error protection) is valid.
[Setting conditions]
Section 20 Flash Memory (0.18-μm F-ZTAT Version)
When an interrupt, such as NMI, occurs during
programming/erasing flash memory.
When the flash memory is read during
programming/erasing flash memory
When the SLEEP instruction is executed during
programming/erasing flash memory
When a bus master other than the CPU, such as the
DMAC, DTC, or BREQ, gets bus mastership during
programming/erasing flash memory.
Rev.6.00 Mar. 18, 2009 Page 729 of 980
REJ09B0050-0600