DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 985
DF2367VF33V
Manufacturer Part Number
DF2367VF33V
Description
IC H8S/2367 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2368VTE34V.pdf
(1044 pages)
Specifications of DF2367VF33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Item
Erasing
Notes: 1. Follow the program/erase algorithms when making the time settings.
2. Programming time per 128 bytes. (Indicates the total time during which the P bit is set
3. Time to erase one block. (Indicates the time during which the E bit is set in FLMCR1.
4. Maximum programming time
5. The maximum number of writes (N) should be set as shown below according to the
6. For the maximum erase time (t
(Additional programming)
Number of writes (n)
in flash memory control register 1 (FLMCR1). Does not include the program-verify
time.)
Does not include the erase-verify time.)
actual set value of (z) so as not to exceed the maximum programming time (t
The wait time after P bit setting (z) should be changed as follows according to the
number of writes (n).
Number of writes (n)
wait time after E bit setting (z) and the maximum number of erases (N):
Wait time after
SWE bit setting *
Wait time after
ESU bit setting *
Wait time after
E bit setting *
Wait time after
E bit clearing *
Wait time after
ESU bit clearing *
Wait time after
EV bit setting *
Wait time after
H'FF dummy
write *
Wait time after
EV bit clearing *
Wait time after
SWE bit clearing *
Maximum number
of erases *
t
1 ≤ n ≤ 6
7 ≤ n ≤ 1000
1 ≤ n ≤ 6
t
E
P
(max) = Wait time after E bit setting (z) × maximum number of erases (N)
(max) = Σ wait time after P bit setting (z)
1
1
*
6
1
i=1
*
N
1
1
6
1
1
1
1
1
Symbol
x
y
z
α
β
γ
ε
η
θ
N
z = 30 µs
z = 200 µs
z = 10 µs
E
(max)), the following relationship applies between the
Min
1
100
—
10
10
20
2
4
100
—
Typ
—
—
—
—
—
—
—
—
—
—
Rev.6.00 Mar. 18, 2009 Page 925 of 980
Section 25 Electrical Characteristics
Max
—
—
10
—
—
—
—
—
—
100
Unit
μs
μs
ms
μs
μs
μs
μs
μs
μs
Times
REJ09B0050-0600
Test
Conditions
Erase time
wait
P
(max)).
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