DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 542

IC H8S/2367 MCU FLASH 128QFP

DF2367VF33V

Manufacturer Part Number
DF2367VF33V
Description
IC H8S/2367 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2367VF33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Timer Pulse Unit (TPU)
10.10.9 Contention between TGR Write and Input Capture
If the input capture signal is generated in the T
operation takes precedence and the write to TGR is not performed.
Figure 10.50 shows the timing in this case.
10.10.10 Contention between Buffer Register Write and Input Capture
If the input capture signal is generated in the T
operation takes precedence and the write to the buffer register is not performed.
Figure 10.51 shows the timing in this case.
Rev.6.00 Mar. 18, 2009 Page 482 of 980
REJ09B0050-0600
φ
Address
Write signal
Input capture
signal
TCNT
TGR
Figure 10.50 Contention between TGR Write and Input Capture
2
2
TGR write cycle
state of a TGR write cycle, the input capture
state of a buffer register write cycle, the buffer
TGR address
T
1
M
T
2
M

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