HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 14

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

7.2
7.3
Section 8 Power-Down Modes
8.1
8.2
8.3
8.4
8.5
8.6
8.7
iv
7.1.4
UBC Register Functions.................................................................................................... 126
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
7.2.9
7.2.10 Break Data Mask Register B (BDMRB).............................................................. 131
7.2.11 Break Control Register (BRCR) .......................................................................... 132
UBC Operation.................................................................................................................. 134
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
Overview............................................................................................................................ 141
8.1.1
8.1.2
8.1.3
Register Description .......................................................................................................... 143
8.2.1
Sleep Mode........................................................................................................................ 145
8.3.1
8.3.2
Standby Mode.................................................................................................................... 145
8.4.1
8.4.2
8.4.3
Module Standby Function.................................................................................................. 147
8.5.1
8.5.2
Timing of STATUS Pin Changes...................................................................................... 148
8.6.1
8.6.2
8.6.3
Hardware Standby Mode ................................................................................................... 153
Break Conditions and Register Settings ............................................................... 125
Break Address Register A (BARA) ..................................................................... 126
Break Address Register B (BARB)...................................................................... 126
Break ASID Register A (BASRA) ....................................................................... 127
Break ASID Register B (BASRB) ....................................................................... 127
Break Address Mask Register A (BAMRA)........................................................ 127
Break Address Mask Register B (BAMRB) ........................................................ 128
Break Bus Cycle Register A (BBRA) .................................................................. 128
Break Bus Cycle Register B (BBRB) .................................................................. 129
Break Data Register B (BDRB) ........................................................................... 130
User Break Operation Flow.................................................................................. 134
Instruction Fetch Cycle Break.............................................................................. 135
Data Access Cycle Break ..................................................................................... 136
Saved Program Counter (PC) Value .................................................................... 137
Examples of Use................................................................................................... 138
Cautions................................................................................................................ 140
Power-Down Modes............................................................................................. 141
Register Configuration ......................................................................................... 142
Pin Configuration ................................................................................................. 143
Standby Control Register (STBCR) ..................................................................... 143
Transition to Sleep Mode ..................................................................................... 145
Canceling Sleep Mode.......................................................................................... 145
Transition to Standby Mode ................................................................................. 145
Canceling Standby Mode ..................................................................................... 146
Clock Pause Function........................................................................................... 147
Transition to Module Standby Function............................................................... 147
Clearing the Module Standby Function................................................................ 148
Timing for Resets ................................................................................................. 148
Timing for Canceling Standbys............................................................................ 150
Timing for Canceling Sleep Mode ....................................................................... 151
........................................................................................ 141