HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 69

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

2.5.2
There are two processor modes: privileged mode and user mode. The processor mode is
determined by the processor mode bit (MD) in the status register (SR). User mode is selected
when the MD bit is 0, and privileged mode when the MD bit is 1. When the reset state or
exception state is entered, the MD bit is set to 1. When exception handling ends, the MD bit is
cleared to 0 and user mode is entered. There are certain registers and bits which can only be
accessed in privileged mode.
Note: * Driving the CA pin low in any state will cause a transition to hardware standby mode (SH7708S,SH7708R only).
Interrupt
Processor Modes
From any state except
hardware standby mode when
RESET = 0 and BREQ = 1
CA = 1, RESET = 0, BREQ = 1
Bus-released state
Bus
request
Sleep mode
Bus
request
clearance
Power-on reset
Figure 2.8 Processor State Transitions
state
RESET = 1,
BREQ = 1
bit cleared
with STBY
instruction
Exception
interrupt
SLEEP
Hardware standby mode*
Exception-handling state
Program execution state
RESET = 0,
BREQ = 1
From any state except
hardware standby mode when
RESET = 0 and BREQ = 0
End of exception
transition
processing
RESET = 1,
BREQ = 0
SLEEP
Manual reset
instruction
with STBY
bit set
Standby mode
state
Reset state
Power-down state
Interrupt
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