HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 432

IC SUPERH MPU ROMLESS 144LQFP

HD6417708SF60

Manufacturer Part Number
HD6417708SF60
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708SF60

Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417708SF60
Manufacturer:
HITACHI
Quantity:
2 400
Part Number:
HD6417708SF60
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60
Manufacturer:
HIT
Quantity:
1 000
Part Number:
HD6417708SF60
Manufacturer:
HIT
Quantity:
330
Part Number:
HD6417708SF60I
Manufacturer:
ACCMICRO
Quantity:
144
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
14.3.6
Initialization: Initialize the SCI using the following procedure before sending or receiving data.
Initialization is also required for switching from transmit mode to receive mode or from receive
mode to transmit mode. Figure 14.5 shows a flowchart of the initialization process.
1. Clear TE and RE in the serial control register (SCSCR) to 0.
2. Clear error flags FER/ERS, PER, and ORER to 0 in the serial status register (SCSSR).
3. Set the C/A bit, parity bit (O/E bit), and baud rate generator select bits (CKS1 and CKS0 bits)
4. Set the SMIF, SDIR, and SINV bits in the smart card mode register (SCSCMR). When the
5. Set the value corresponding to the bit rate in the bit rate register (SCBRR).
6. Set the clock source select bits (CKE1 and CKE0 bits) in the serial control register (SCSCR).
7. After waiting at least 1 bit, set the TIE, RIE, TE, and RE bits in SCSCR. Do not set the TE and
412
in the serial mode register (SCSMR). At this time also clear the CHR and MP bits to 0 and set
the STOP and PE bits to 1.
SMIF bit is set to 1, the TxD and RxD pins both switch from ports to SCI pins and become
high impedance.
Clear the TIE, RIE, TE, RE, MPIE, and TEIE bits to 0. When the CKE0 bit is set to 1, a clock
is output from the SCK0 pin.
RE bits simultaneously unless performing auto-diagnosis.
Data Transmission and Reception

Related parts for HD6417708SF60