HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 223

IC SUPERH MPU ROMLESS 144LQFP

HD6417708SF60

Manufacturer Part Number
HD6417708SF60
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708SF60

Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

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Bit 0—Area 6 Bus Type (A6PCM): Designates whether to access physical space area 6 as
PCMCIA space.
Bit 0: A6PCM
0
1
Note: MD4 pin output is CE2B.
10.2.2
Bus control register 2 (BCR2) is a 16-bit read/write register that selects the bus size of each area,
and whether to use the 8-bit port. It is initialized to H'3FFC by a power-on reset, but is not
initialized by a manual reset or in standby mode. Do not access external memory outside area 0
until BCR2 register initialization is complete.
Bits 15, 14, and 1—Reserved: These bits always read 0. The write value should always be 0.
Bits 2n + 1, 2n—Area n (1–6) Bus Size Specification (AnSZ1, AnSZ0): These bits specify the bus
sizes of physical space area n (n = 1 to 6).
Initial value:
Initial value:
Bit name:
Bit name:
Bus Control Register 2 (BCR2)
R/W:
R/W:
Bit:
Bit:
A3SZ1
Description
Access physical space area 6 as normal memory.
Access physical space area 6 as PCMCIA space.*
R/W
15
0
R
7
1
A3SZ0
R/W
14
0
R
6
1
A6SZ1
A2SZ1
R/W
R/W
13
1
5
1
A6SZ0
A2SZ0
R/W
R/W
12
1
4
1
A5SZ1
A1SZ1
R/W
R/W
11
1
3
1
A5SZ0
A1SZ0
R/W
R/W
10
1
2
1
A4SZ1
R/W
9
1
1
0
(Initial value)
PORTEN
A4SZ0
R/W
R/W
8
1
0
0
203

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