HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 325

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

11.2.2
TSTR is an 8-bit read/write register that selects whether to run or halt the timer counters (TCNT)
for channels 0–2. TSTR is initialized to H'00 by a power-on reset or manual reset. In standby
mode, when the PLL1 multiplication factor is changed in clock mode 0, 1, 2, or 7, or when the
MSTP2 bit is set to 1 in STBCR, TSTR is initialized only when the input clock selected for the
channel is an external clock (TCLK) or the peripheral clock (Pø).
Bits 7 to 3—Reserved: These bits always read 0. The write value should always be 0.
Bit 2—Counter Start 2 (STR2): Selects whether to run or halt timer counter 2 (TCNT2).
Bit 2: STR2
0
1
Bit 1—Counter Start 1 (STR1): Selects whether to run or halt timer counter 1 (TCNT1).
Bit 1: STR1
0
1
Bit 0—Counter Start 0 (STR0): Selects whether to run or halt timer counter 0 (TCNT0).
Bit 0: STR0
0
1
Initial value:
Bit name:
Timer Start Register (TSTR)
R/W:
Bit:
Description
Halt TCNT2 count
Start TCNT2 counting
Description
Halt TCNT1 count
Start TCNT1 counting
Description
Halt TCNT0 count
Start TCNT0 counting
—
7
0
R
—
6
0
R
—
5
0
R
—
4
0
R
—
3
0
R
STR2
R/W
2
0
STR1
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
STR0
R/W
0
0
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