UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 272

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
<R>
with the count clock, and the counter starts counting. At this time, the output of the TOQn0 pin is inverted. Additionally,
the set value of the TQnCCR0 register is transferred to the CCR0 buffer register.
cleared to 0000H, the output of the TOQn0 pin is inverted, and a compare match interrupt request signal
(INTTQnCC0) is generated.
270
TQnCTL0
TQnCTL1
When the TQnCE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H in synchronization
When the count value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is
The interval can be calculated by the following expression.
Interval = (Set value of TQnCCR0 register + 1) × Count clock cycle
Remark
(a) TMQn control register 0 (TQnCTL0)
(b) TMQn control register 1 (TQnCTL1)
Note Enable setting of the TQ0EEE bit to 1 only when timer output (TOQ00, TOQ0b) is used.
TQnCE
n = 0, 1
0/1
0
In this case, set the TQ0CCR0 and TQ0CCRb registers to the same value (b = 1 to 3).
TQ0EST
Figure 7-10. Register Setting for Interval Timer Mode Operation (1/3)
0
0
TQ0EEE
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
0/1
0
Note
0
0
User’s Manual U17716EJ2V0UD
0
0
TQnCKS2 TQnCKS1 TQnCKS0
TQnMD2 TQnMD1 TQnMD0
0/1
0
0/1
0
0/1
0
0, 0, 0:
Interval timer mode
0: Operate on count
1: Count with external
Select count clock
0: Stop counting
1: Enable counting
clock selected by
TQ0CKS0 to TQ0CKS2 bits
event count input signal