UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 48

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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(3) On-chip peripheral I/O area
Cautions 1. If word access of a register is attempted, halfword access to the word area is performed
A 4 KB area from 3FFF000H to 3FFFFFFH is reserved as the on-chip peripheral I/O area.
On-chip peripheral I/O registers assigned with functions such as on-chip peripheral I/O operation mode
specification and state monitoring are mapped to the on-chip peripheral I/O area. Program fetches are not
allowed in this area.
2. If a register that can be accessed in byte units is accessed in halfword units, the higher 8
3. Addresses that are not defined as registers are reserved for future expansion. If these
twice, first for the lower bits, then for the higher bits, ignoring the lower 2 address bits.
bits become undefined if the access is a read operation. If a write access is performed,
only the data in the lower 8 bits is written to the register.
addresses are accessed, the operation is undefined and not guaranteed.
Physical address space
3FFFFFFH
3FFF000H
Figure 3-7. On-Chip Peripheral I/O Area
CHAPTER 3 CPU FUNCTION
User’s Manual U17716EJ2V0UD
On-chip peripheral I/O area
(4 KB)
Logical address space
FFFFFFFH
FFFF000H