MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 204

• Manufacturer Part Number: MCF5280CVM66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5280CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Program Memory Size: 2KB
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Interrupt Controller Modules
10-14
Source
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
MCF5214
MCF5216
Not used
Module
QADC
GPTB
GPTA
Note:
PMM
PIT0
FEC
on
&
Table 10-13. Interrupt Source Assignment for INTC0 (continued)
X_INTB
R_INTF
R_INTB
HBERR
X_INTF
EBERR
PAOVF
PAOVF
BABR
BABT
LVDF
GRA
Flag
PAIF
PAIF
CF1
CF2
TOF
TOF
PF1
PF2
C0F
C1F
C2F
C3F
C0F
C1F
C2F
C3F
PIF
UN
MII
RL
LC
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Transmit frame interrupt
Transmit buffer interrupt
Transmit FIFO underrun
Collision retry limit
Receive frame interrupt
Receive buffer interrupt
MII interrupt
Late collision
Heartbeat error
Graceful stop complete
Ethernet bus error
Babbling transmit error
Babbling receive error
LVD
Queue 1 conversion complete
Queue 2 conversion complete
Queue 1 conversion pause
Queue 2 conversion pause
Timer overflow
Pulse accumulator input
Pulse accumulator overflow
Timer channel 0
Timer channel 1
Timer channel 2
Timer channel 3
Timer overflow
Pulse accumulator input
Pulse accumulator overflow
Timer channel 0
Timer channel 1
Timer channel 2
Timer channel 3
PIT interrupt flag
Source Description
Write X_INTF = 1
Write X_INTB = 1
Write UN = 1
Write RL = 1
Write R_INTF = 1
Write R_INTB = 1
Write MII = 1
Write LC = 1
Write HBERR = 1
Write GRA = 1
Write EBERR = 1
Write BABT = 1
Write BABR = 1
Write LVDF = 1
Write CF1 = 0 after reading CF1 = 1
Write CF2 = 0 after reading CF2 = 1
Write PF1 = 0 after reading PF1 = 1
Write PF2 = 0 after reading PF2 = 1
Write TOF = 1 or access TIMCNTH/L if TFFCA = 1
Write PAIF = 1 or access PAC if TFFCA = 1
Write PAOVF = 1 or access PAC if TFFCA = 1
Write C0F = 1 or access IC/OC if TFFCA = 1
Write C1F = 1 or access IC/OC if TFFCA = 1
Write C2F = 1 or access IC/OC if TFFCA = 1
Write C3F = 1 or access IC/OC if TFFCA = 1
Write TOF = 1 or access TIMCNTH/L if TFFCA = 1
Write PAIF = 1 or access PAC if TFFCA = 1
Write PAOVF = 1 or access PAC if TFFCA = 1
Write C0F = 1 or access IC/OC if TFFCA = 1
Write C1F = 1 or access IC/OC if TFFCA = 1
Write C2F = 1 or access IC/OC if TFFCA = 1
Write C3F = 1 or access IC/OC if TFFCA = 1
Write PIF = 1 of write PMR
Flag Clearing Mechanism
Freescale Semiconductor