MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 219

• Manufacturer Part Number: MCF5280CVM66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5280CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Program Memory Size: 2KB
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Freescale Semiconductor
1
0x00_00BC
0x00_00CC
0x00_008C
0x00_009C
0x00_00AC
0x00_00C0
0x00_00C4
0x00_00C8
0x00_00D0
0x00_0080
0x00_0084
0x00_0088
0x00_0090
0x00_0094
0x00_0098
0x00_00A0
0x00_00A4
0x00_00A8
0x00_00B0
0x00_00B4
0x00_00B8
Addresses not assigned to a register and undefined register bits are reserved for expansion. Write accesses to
these reserved address spaces and reserved register bits have no effect.
IPSBAR
Offset
Chip select address register—bank 0 (CSAR0)
Chip select address register—bank 1 (CSAR1)
Chip select address register—bank 2 (CSAR2)
Chip select address register—bank 3 (CSAR3)
Chip select address register—bank 4 (CSAR4)
Chip select address register—bank 5 (CSAR5)
Chip select address register—bank 6 (CSAR6)
[31:24]
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
[p. 12-6]
[p. 12-6]
[p. 12-6]
[p. 12-6]
[p. 12-6]
[p. 12-6]
[p. 12-6]
Chip select mask register—bank 0 (CSMR0) [p. 12-6]
Chip select mask register—bank 1 (CSMR1) [p. 12-6]
Chip select mask register—bank 2 (CSMR2) [p. 12-6]
Chip select mask register—bank 3 (CSMR3) [p. 12-6]
Chip select mask register—bank 4 (CSMR4) [p. 12-6]
Chip select mask register—bank 5 (CSMR5) [p. 12-6]
Chip select mask register—bank 6 (CSMR6) [p. 12-6]
Table 12-5. Chip Select Registers
1
1
1
1
1
1
1
[23:16]
Chip select control register—bank 0
Chip select control register—bank 1
Chip select control register—bank 2
Chip select control register—bank 3
Chip select control register—bank 4
Chip select control register—bank 5
Chip select control register—bank 6
[15:8]
(CSCR0) [p. 12-7]
(CSCR1) [p. 12-7]
(CSCR2) [p. 12-7]
(CSCR3) [p. 12-7]
(CSCR4) [p. 12-7]
(CSCR5) [p. 12-7]
(CSCR6) [p. 12-7]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
1
1
1
1
1
1
1
[7:0]
Chip Select Module
12-5