MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 619

IC MPU 32BIT COLDF 256-MAPBGA

MCF5280CVM66

Manufacturer Part Number
MCF5280CVM66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5280CVM66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
No. Of I/o's
150
Program Memory Size
2KB
Ram Memory Size
64KB
Cpu Speed
66.67MHz
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Chapter 30
Debug Support
This chapter describes the Revision A enhanced hardware debug support.
30.1
The debug module is shown in
Debug support is divided into three areas:
Freescale Semiconductor
Real-time trace support—The ability to determine the dynamic execution path through an
application is fundamental for debugging. The ColdFire solution implements an 8-bit parallel
output bus that reports processor execution status and data to an external emulator system. See
Section 30.3, “Real-Time Trace
Background debug mode (BDM)—Provides low-level debugging in the ColdFire processor
complex. In BDM, the processor complex is halted and a variety of commands can be sent to the
processor to access memory and registers. The external emulator uses a three-pin, serial,
full-duplex channel. See
“Programming
Real-time debug support—BDM requires the processor to be halted, which many real-time
embedded applications cannot do. Debug interrupts let real-time systems execute a unique service
routine that can quickly save the contents of key registers and variables and return the system to
normal operation. External development systems can access saved data because the hardware
supports concurrent operation of the processor and BDM-initiated commands. See
“Real-Time Debug
Overview
Enabling Flash security disables BDM communications.
Control
Model.”
BKPT
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Support.”
Figure 30-1. Processor/Debug Module Interface
Figure
PST[3:0], DDATA[3:0]
Section 30.5, “Background Debug Mode
ColdFire CPU Core
Debug Module
Trace Port
CLKOUT
30-1.
Support.”
NOTE
Communication Port
DSCLK, DSI, DSO
(BDM),” and
High-speed
local bus
Section 30.4,
Section 30.6,
30-1

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