MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 480

• Manufacturer Part Number: MCF5280CVM66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5280CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Program Memory Size: 2KB
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

FlexCAN
Note that the received identifier field is always stored in the matching MB, thus the contents of the
identifier field in a MB may change if the match was due to mask.
25.4.2.1 Self-Received Frames
The FlexCAN receives self-transmitted frames if there exists a matching receive MB.
25.4.3
Message Buffer Handling
To maintain data coherency and proper FlexCAN operation, the CPU must obey the rules listed in
Section 25.4.1, “Transmit
Process” and in
Section 25.4.2, “Receive
Process.” Deactivation of a message
buffer (MB) is a host action that causes that message buffer to be excluded from FlexCAN transmit or
receive processes. Any CPU write access to a control/status word of MB structure deactivates that MB,
thus excluding it from Rx/Tx processes. Any form of CPU MB structure access within the FlexCAN (other
than those specified in
Section 25.4.1, “Transmit
Process” and in
Section 25.4.2, “Receive
Process”) may
cause the FlexCAN to behave in an unpredictable manner.
The match/arbitration processes are performed only during one period by the FlexCAN. Once a winner or
match is determined, there is no re-evaluation whatsoever, in order to ensure that a receive frame is not
lost. Two receive MBs or more that hold a matching ID to a received frame do not assure reception in the
FlexCAN if the user has deactivated the matching MB after FlexCAN has scanned the second.
25.4.3.1 Serial Message Buffers (SMBs)
To allow double buffering of messages, the FlexCAN has two shadow buffers called serial message
buffers. These two buffers are used by the FlexCAN for buffering both received messages and messages
to be transmitted. Only one SMB is active at a time, and its function depends upon the operation of the
FlexCAN at that time. At no time does the user have access to or visibility of these two buffers.
25.4.3.2 Transmit Message Buffer Deactivation
Any write access to the control/status word of a transmit message buffer during the process of selecting a
message buffer for transmission immediately deactivates that message buffer, removing it from the
transmission process.
If the user deactivates the transmit MB while a message is being transferred from a transmit message buffer
to a SMB the message will not be transmitted.
If the user deactivates the transmit message buffer after the message is transferred to the SMB, the message
will be transmitted, but no interrupt will be requested and the transmit code will not be updated.
If a message buffer containing the lowest ID is deactivated while that message is undergoing the internal
arbitration process to determine which message should be sent, then that message may not be transmitted.
25.4.3.3 Receive Message Buffer Deactivation
Any write access to the control/status word of a receive message buffer during the process of selecting a
message buffer for reception immediately deactivates that message buffer, removing it from the reception
process.
If a receive message buffer is deactivated while a message is being transferred into it, the transfer is halted
and no interrupt is requested. If this occurs, that receive message buffer may contain mixed data from two
different frames.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
25-10
Freescale Semiconductor