WG82574L S LBA9 Intel, WG82574L S LBA9 Datasheet - Page 332
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WG82574L S LBA9
Manufacturer Part Number
WG82574L S LBA9
Description
CONTROLLER, ENET, INTEL 82574L, 64PQFN
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAC.pdf
(490 pages)
Specifications of WG82574L S LBA9
Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
0°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Note:
10.2.5.5
Note:
10.2.5.6
Note:
10.2.5.7
Note:
332
This register's address has been moved from where it was located in previous devices.
However, for backwards compatibility, this register can also be accessed at its alias
offset of 0x00160.
Receive Descriptor Base Address Low - RDBAL (0x02800 +
n*0x100[n=0..1]; RW)
This register contains the lower bits of the 64-bit descriptor base address. The lower 4
bits are always ignored. The Receive Descriptor Base Address must point to a 16-byte
aligned block of data.
This register's address has been moved from where it was located in previous devices.
However, for backwards compatibility, this register can also be accessed at its alias
offset of 0x00110.
Receive Descriptor Base Address High - RDBAH (0x02804 +
n*0x100[n=0..1]; RW)
This register contains the upper 32 bits of the 64-bit descriptor base address.
This register's address has been moved from where it was located in previous devices.
However, for backwards compatibility, this register can also be accessed at its alias
offset of 0x00114.
Receive Descriptor Length - RDLEN (0x02808 + n*0x100[n=0..1];
RW)
This register sets the number of bytes allocated for descriptors in the circular descriptor
buffer. It must be 128-byte aligned.
This register's address has been moved from where it was located in previous devices.
However, for backwards compatibility, this register can also be accessed at its alias
offset of 0x00118.
0
RDBAL
RDBAH
0
LEN
Reserved
Field
Field
Field
3:0
31:4
31:0
6:0
19:7
31:20
Bit(s)
Bit(s)
Bit(s)
0x0
X
X
0x0
0x0
0x0
Initial
Initial
Initial
Value
Value
Value
Ignored on writes. Returns 0b on reads.
Receive Descriptor Base Address Low
Receive Descriptor Base Address [63:32]
Ignore on write. Reads back as 0x0.
Descriptor Length
Reads as 0x0. Should be written to 0x0 for future compatibility.
82574 GbE Controller—Driver Programing Interface
Description
Description
Description
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