WG82574L S LBA9 Intel, WG82574L S LBA9 Datasheet - Page 360
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WG82574L S LBA9
Manufacturer Part Number
WG82574L S LBA9
Description
CONTROLLER, ENET, INTEL 82574L, 64PQFN
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAC.pdf
(490 pages)
Specifications of WG82574L S LBA9
Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
0°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.2.7.31
10.2.7.32
10.2.7.33
10.2.7.34
360
In addition, it sticks at 0xFFFF_FFFF_FFFF_FFFF when the maximum value is reached.
Only packets that pass address filtering are counted in this register. This register only
increments if receives are enabled.
These octets do not include octets in received flow control packets.
Good Octets Transmitted Count - GOTCL (0x04090; R)
Good Octets Transmitted Count - GOTCH (0x04094; R)
These registers make up a logical 64-bit register that counts the number of good (non-
erred) octets transmitted. This register must be accessed using two independent 32-bit
accesses. This register resets whenever the upper 32 bits are read (GOTCH).
In addition, it sticks at 0xFFFF_FFFF_FFFF_FFFF when the maximum value is reached.
This register includes bytes transmitted in a packet from the <Destination Address>
field through the <CRC> field, inclusively. This register counts octets in successfully
transmitted packets which are 64 or more bytes in length. This register only increments
if transmits are enabled. The register counts clear as well as secure octets.
These octets do not include octets in transmitted flow control packets.
Receive No Buffers Count - RNBC (0x040A0; R)
This register counts the number of times that frames were received when there were
no available buffers in host memory to store those frames (receive descriptor head and
tail pointers were equal). The packet is still received if there is space in the FIFO. This
register only increments if receives are enabled.
This register does not increment when flow control packets are received.
Receive Undersize Count - RUC (0x040A4; R)
This register counts the number of received frames that passed address filtering, and
were less than minimum size (64 bytes from <Destination Address> through <CRC>,
inclusively), and had a valid CRC. This register only increments if receives are enabled.
GOTCL
GOTCH
RNBC
RUC
Field
Field
Field
31:0
31:0
31:0
31:0
Bit(s)
Bit(s)
Bit(s)
0x0
0x0
0x0
0x0
Initial
Initial
Initial
Value
Value
Value
Number of good octets transmitted – lower 4 bytes.
Number of good octets transmitted – upper 4 bytes.
Number of receive no buffer conditions.
Number of receive undersize errors.
82574 GbE Controller—Driver Programing Interface
Description
Description
Description
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