AT90USB647-MU Atmel, AT90USB647-MU Datasheet - Page 163

• Manufacturer Part Number: AT90USB647-MU
• Description: MCU, 8BIT, 64K FLASH, USB, 64QFN
• Manufacturer: Atmel

Specifications of AT90USB647-MU

• Controller Family/series: AT90
• No. Of I/o's: 48
• Eeprom Memory Size: 2KB
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 64KB
• Oscillator Type: External, Internal
• Package: 64QFN EP
• Device Core: AVR
• Family Name: AT90
• Maximum Speed: 20 MHz
• Ram Size: 4 KB
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 48
• Interface Type: SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 4
• Lead Free Status / Rohs Status: Details

15.8.2
7593K–AVR–11/09
Timer/Counter Control Register B – TCCR2B
Table 15-7.
Notes:
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2A output is
changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is implemented as a
strobe. Therefore it is the value present in the COM2A1:0 bits that determines the effect of the
forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2A as TOP.
The FOC2A bit is always read as zero.
• Bit 6 – FOC2B: Force Output Compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2B output is
changed according to its COM2B1:0 bits setting. Note that the FOC2B bit is implemented as a
strobe. Therefore it is the value present in the COM2B1:0 bits that determines the effect of the
forced compare.
A FOC2B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2B as TOP.
The FOC2B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
Bit
Read/Write
Initial Value
Mode
3
4
5
6
7
1. MAX= 0xFF
2. BOTTOM= 0x00
WGM2
0
1
1
1
1
7
FOC2A
W
0
Waveform Generation Mode Bit Description
WGM1
1
0
0
1
1
6
FOC2B
W
0
WGM0
1
0
1
0
1
5
–
R
0
Timer/Counter
Mode of
Operation
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
4
–
R
0
3
WGM22
R/W
0
OCRA
OCRA
0xFF
TOP
2
CS22
R/W
0
–
–
Update of
OCRx at
CS21
R/W
1
0
AT90USB64/128
TOP
TOP
TOP
–
–
0
CS20
R/W
0
Set on
TOV Flag
BOTTOM
MAX
TOP
–
–
TCCR2B
(1)(2)
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