UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 128

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

128
(2) Example of setting procedure when using the external main system clock
(3) Example of setting procedure when using high-speed system clock as CPU clock and peripheral
<1> Setting P121/X1 and P122/X2/EXCLK pins and selecting operation mode (OSCCTL register)
<2> Controlling external main system clock input (MOC register)
Cautions 1. Do not change the value of EXCLK and OSCSEL while the external main system clock is
hardware clock
<1> Setting high-speed system clock oscillation
<2> Setting the high-speed system clock as the main system clock (MCM register)
<3> Setting the main system clock as the CPU clock and selecting the division ratio (PCC register)
When EXCLK and OSCSEL are set to 1, the mode is switched from port mode to external clock input
mode.
When MSTOP is cleared to 0, the input of the external main system clock is enabled.
(See 5.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of
setting procedure when using the external main system clock.)
Note The setting of <1> is not necessary when high-speed system clock is already operating.
When XSEL and MCM0 are set to 1, the high-speed system clock is supplied as the main system clock
and peripheral hardware clock.
When CSS is cleared to 0, the main system clock is supplied to the CPU. To select the CPU clock
division ratio, use PCC0, PCC1, and PCC2.
Caution If the high-speed system clock is selected as the main system clock, a clock other than
EXCLK
XSEL
CSS
2. Set the external main system clock after the supply voltage has reached the operable
1
1
0
operating.
voltage of the clock to be used (see CHAPTER 27
(STANDARD PRODUCTS)).
the high-speed system clock cannot be set as the peripheral hardware clock.
OSCSEL
MCM0
PCC2
1
1
0
0
0
0
1
Other than above
High-speed system clock (f
External clock input mode
Selection of Main System Clock and Clock Supplied to Peripheral Hardware
Speed System Clock Pin
Operation Mode of High-
PCC1
CHAPTER 5 CLOCK GENERATOR
0
0
1
1
0
Main System Clock (f
User’s Manual U18698EJ1V0UD
PCC0
0
1
0
1
0
Note
XH
f
f
f
f
f
Setting prohibited
XP
XP
XP
XP
XP
XP
)
I/O port
)
/2 (default)
/2
/2
/2
2
3
4
P121/X1 Pin
CPU Clock (f
High-speed system clock (f
Peripheral Hardware Clock (f
CPU
ELECTRICAL SPECIFICATIONS
External clock input
P122/X2/EXCLK Pin
) Selection
XH
)
PRS
)