UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 426

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

16.4.3 Bit sequential buffer mode
(1) Register description
426
Address: FF4CH
MC0CTL0
The bit sequential buffer mode is used to output sequential signals using the MCGO pin.
Symbol
The MCG control register 0 (MC0CTL0), MCG control register 1 (MC0CTL1), and MCG control register 2
(MC0CTL2) are used to set the bit sequential buffer mode.
(a) MCG control register 0 (MC0CTL0)
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 10H.
Caution Clear (0) the MC0PWR bit before rewriting the MC0DIR, MC0OSL, and MC0OLV bits (it is
MC0PWR
MC0PWR
MC0OSL
MC0OLV
MC0DIR
<7>
0
1
0
1
0
1
0
1
After reset: 10H
possible to rewrite these bits by an 8-bit memory manipulation instruction at the same
time when the MC0PWR bit is set (1)).
Operation stopped
Operation enabled
MSB
LSB
Manchester code
Bit sequential data
Low level
High level
6
0
CHAPTER 16 MANCHESTER CODE GENERATOR
R/W
5
0
User’s Manual U18698EJ1V0UD
Output level when transmission suspended
MC0DIR
<4>
First bit specification
Operation control
Data format
3
0
2
0
MC0OSL
<1>
MC0OLV
<0>