UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 222

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

7.3 Registers Controlling 8-Bit Timer/Event Counters 50, 51, and 52
(1) Timer clock selection register 5n (TCL5n)
222
The following five registers are used to control 8-bit timer/event counters 50, 51, and 52.
Notes 1.
Cautions 1. When rewriting TCL50 to other data, stop the timer operation beforehand.
Remark f
This register sets the count clock of 8-bit timer/event counter 5n and the valid edge of the TI5n pin input.
TCL5n can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets TCL5n to 00H.
Remark n = 0 to 2
Address: FF6AH
Symbol
TCL50
Timer clock selection register 5n (TCL5n)
8-bit timer mode control register 5n (TMC5n)
Input switch control register (ISC)
Port mode register 3 (PM3)
Port register 3 (P3)
2.
2. Be sure to clear bits 3 to 7 to 0.
PRS
If the peripheral hardware clock (f
f
If the peripheral hardware clock (f
= 0), when 1.8 V
prohibited.
PRS
: Peripheral hardware clock frequency
V
V
DD
DD
TCL502
operating frequency varies depending on the supply voltage.
= 2.7 to 5.5 V: f
= 1.8 to 2.7 V: f
7
0
0
0
0
0
1
1
1
1
After reset: 00H
Figure 7-6. Format of Timer Clock Selection Register 50 (TCL50)
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50, 51, AND 52
TCL501
6
0
0
0
1
1
0
0
1
1
V
DD
PRS
PRS
< 2.7 V, the setting of TCL502, TCL501, TCL500 = 0, 1, 0 (count clock: f
R/W
10 MHz
5 MHz
TCL500
User’s Manual U18698EJ1V0UD
5
0
0
1
0
1
0
1
0
1
PRS
PRS
) operates on the internal high-speed oscillation clock (f
) operates on the high-speed system clock (f
Setting prohibited
f
f
f
f
f
f
PRS
PRS
PRS
PRS
PRS
PRS
Note2
/2
/2
/2
/2
/2
4
0
2
6
8
13
3
0
Count clock selection
2 MHz
1 MHz
500 kHz
31.25 kHz
7.81 kHz
0.24 kHz
TCL502
2 MHz
f
PRS
2
=
5 MHz
2.5 MHz
1.25 MHz
78.13 kHz
19.53 kHz
0.61 kHz
Note1
TCL501
5 MHz
f
PRS
1
=
XH
) (XSEL = 1), the
10 MHz
5 MHz
2.5 MHz
156.25 kHz
39.06 kHz
1.22 kHz
TCL500
10 MHz
f
PRS
0
RH
=
) (XSEL
PRS
) is