UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 170
UPD78F0413GA-GAM-AX
Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet
1.UPD78F0413GA-GAM-AX.pdf
(562 pages)
Specifications of UPD78F0413GA-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal
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(2) Operation in clear & start mode entered by TI000 pin valid edge input
170
(CR000: compare register, CR010: capture register)
This is an application example where the TO00 output level is inverted when the count value has been captured
& cleared.
The count value is captured to CR010 and TM00 is cleared (to 0000H) when the valid edge of the TI000 pin is
detected. When the count value of TM00 is 0001H, a compare match interrupt signal (INTTM000) is generated,
and the TO00 output level is inverted.
Capture & count clear input
Compare match interrupt
Figure 6-26. Timing Example of Clear & Start Mode Entered by TI000 Pin Valid Edge Input
Figure 6-25. Block Diagram of Clear & Start Mode Entered by TI000 Pin Valid Edge Input
TI000 pin
Count clock
(TMC003, TMC002)
Compare register
Capture interrupt
(TI000 pin input)
Capture register
(a) TOC00 = 13H, PRM00 = 10H, CRC00, = 04H, TMC00 = 08H, CR000 = 0001H
TMC003, TMC002
TM00 register
Operable bits
TO00 output
Operable bits
(INTTM000)
(INTTM010)
(CR000)
(CR010)
(CR000: Compare Register, CR010: Capture Register) (1/2)
0000H
Capture signal
detector
(CR000: Compare Register, CR010: Capture Register)
Edge
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
00
0001H
0000H
User’s Manual U18698EJ1V0UD
Capture register
Timer counter
(CR010)
(TM00)
M
Compare register
Clear
(CR000)
10
Match signal
M
N
N
S
controller
Output
S
TO00
output
P
Interrupt signal
(INTTM000)
Interrupt signal
(INTTM010)
TO00 pin
P
Q
Q
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