UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 561

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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29.2 Peripheral Hardware That Generates Wait
clocks.
Caution When the CPU is operating on the subsystem clock and the peripheral hardware clock is stopped,
Remark The clock is the CPU clock (f
Serial interface
UART0
Serial interface
UART6
10-bit
successive
approximation
type A/D
converter
Table 29-1 lists the registers that issue a wait request when accessed by the CPU, and the number of CPU wait
Peripheral
Hardware
do not access the registers listed above using an access method in which a wait request is issued.
Table 29-1. Registers That Generate Wait and Number of CPU Wait Clocks
ASIS0
ASIS6
ADM
ADS
ADPC
ADCR
The above number of clocks is when the same source clock is selected for f
clocks can be calculated by the following expression and under the following conditions.
<Calculating number of wait clocks>
<Conditions for maximum/minimum number of wait clocks>
Number of wait clocks =
Maximum number of times: Maximum speed of CPU (f
Minimum number of times: Minimum speed of CPU (f
* Fraction is truncated if the number of wait clocks
f
f
f
f
AD
CPU
PRS
XP
:
:
: Peripheral hardware clock frequency
: CPU clock frequency
Register
A/D conversion clock frequency (f
Main system clock frequency
CPU
CHAPTER 29 CAUTIONS FOR WAIT
).
2 f
Read
Read
Write
Write
Write
Read
User’s Manual U18698EJ1V0UD
f
AD
CPU
+ 1
Access
PRS
/2 to f
PRS
SUB
0.5 and rounded up if the number of wait clocks > 0.5.
/12)
XP
/2), highest speed of A/D conversion clock (f
), lowest speed of A/D conversion clock (f
1 clock (fixed)
1 clock (fixed)
1 to 5 clocks (when f
1 to 7 clocks (when f
1 to 9 clocks (when f
2 to 13 clocks (when f
2 to 17 clocks (when f
2 to 25 clocks (when f
Number of Wait Clocks
CPU
and f
AD
AD
AD
AD
AD
AD
= f
= f
= f
= f
= f
= f
PRS
PRS
PRS
PRS
PRS
PRS
PRS
. The number of wait
/2 is selected)
/3 is selected)
/4 is selected)
/6 is selected)
/8 is selected)
/12 is selected)
PRS
PRS
/12)
/2)
561

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