UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 161

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

6.4.2 Square wave output operation
TO00 pin by setting the 16-bit timer output control register 00 (TOC00) to 03H.
CR000), the counting operation is started in synchronization with the count clock.
(INTTM000) is generated, and TO00 output is inverted. This TO00 output that is inverted at fixed intervals enables
TO00 to output a square wave.
When 16-bit timer/event counter 00 operates as an interval timer (see 6.4.1), a square wave can be output from the
When TMC003 and TMC002 are set to 11 (count clear & start mode entered upon a match between TM00 and
When the value of TM00 later matches the value of CR000, TM00 is cleared to 0000H, an interrupt signal
Remarks 1. For the setting of I/O pins, see 6.3 (6) Port mode register 3 (PM3).
Compare match interrupt
Count clock
(TMC003, TMC002)
2. For how to enable the INTTM000 signal interrupt, see CHAPTER 17 INTERRUPT FUNCTIONS.
Compare register
TM00 register
TMC003, TMC002
Operable bits
TO00 output
(INTTM000)
Operable bits
Figure 6-17. Basic Timing Example of Square Wave Output Operation
(CR000)
0000H
Figure 6-16. Block Diagram of Square Wave Output Operation
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
00
Interval
(N + 1)
User’s Manual U18698EJ1V0UD
16-bit counter (TM00)
N
CR000 register
Clear
Interval
(N + 1)
Match signal
N
11
N
Interval
(N + 1)
controller
N
Output
INTTM000 signal
TO00
output
Interval
(N + 1)
N
TO00 pin
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