IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 10
IPSR-VIDEO
Manufacturer Part Number
IPSR-VIDEO
Description
RENEWAL Of IPS-VIDEO
Manufacturer
Altera
Series
IP Suitesr
Datasheet
1.IPS-VIDEO.pdf
(202 pages)
Specifications of IPSR-VIDEO
Software Application
IP CORE, SUITES
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Features
Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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Release Information
Table 1–1. Video and Image Processing Suite Release Information
Device Family Support
Table 1–2. Altera IP Core Device Support Levels
Video and Image Processing Suite User Guide
Version
Release Date
Ordering Code
Product IDs
Vendor ID(s)
Preliminary—The core is verified with preliminary timing
models for this device family. The core meets all
functional requirements, but might still be undergoing
timing analysis for the device family. It can be used in
production designs with caution.
Final—The core is verified with final timing models for
this device family. The core meets all functional and
timing requirements for the device family and can be used
in production designs.
Item
f
FPGA Device Families
Table 1–1
Processing Suite MegaCore functions.
For more information about this release, refer to the
and
MegaCore functions can provide the types of support for target Altera device families
described in
Table 1–3
MegaCore functions to each Altera device family.
Table 1–3. Device Family Support (Part 1 of 2)
10.1 (All MegaCore functions)
January 2011
IPS-VIDEO (Video and Image Processing Suite)
00B3 (2D FIR Filter)
00B4 (2D Median Filter)
00B5 (Alpha Blending Mixer)
00B1 (Chroma Resampler)
00C8 (Clipper)
00C4 (Clocked Video Input)
00C5 (Clocked Video Output)
6AF7
Arria
Arria II GX
Cyclone
Errata.
®
GX
®
II
provides information about this release of the Altera Video and Image
shows the level of support offered by the Video and Image Processing Suite
Table
Device Family
1–2.
00C9 (Color Plane Sequencer)
0003 (Color Space Converter)
00D0 (Control Synchronizer)
00B6 (Deinterlacer)
00D1 (Frame Reader)
00C3 (Frame Buffer)
HardCopy Companion—The core is verified with preliminary
timing models for the HardCopy companion device. The core
meets all functional requirements, but might still be undergoing
timing analysis for HardCopy device family. It can be used in
production designs with caution.
HardCopy Compilation—The core is verified with final timing
models for the HardCopy device family. The core meets all
functional and timing requirements for the device family and
can be used in production designs.
Description
Final
Preliminary
Final
HardCopy
Chapter 1: About This MegaCore Function Suite
MegaCore IP Library Release Notes
®
Device Families
00B2 (Gamma Corrector)
00DC (Interlacer)
00B7 (Scaler)
00B7 (Scaler II)
00CF (Switch)
00CA (Test Pattern Generator)
Support
January 2011 Altera Corporation
Release Information
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