IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 197

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 7: Control Register Maps
Test Pattern Generator
Table 7–21. Test Pattern Generator Control Register Map
January 2011 Altera Corporation
0
1
2
3
4
5
6
Note to
(1) Value can be from 32 to the maximum specified in the parameter editor.
(2) These control registers are only available when the test pattern generator MegaCore function is configured to output a uniform color
Address
background and when the run-time control interface has been enabled.
Table
Control
Status
Output Width
Output Height
R/Y
G/Cb
B/Cr
7–21:
Register(s)
Table 7–21
map.
Bit 0 of this register is the Go bit, all other bits are unused. Setting this bit to 0 causes the
Test Pattern Generator MegaCore function to stop before control information is read.
Refer to
page 5–64
Bit 0 of this register is the Status bit, all other bits are unused. The Test Pattern
Generator MegaCore function sets this address to 0 between frames. It is set to 1 while
the MegaCore function is producing data and cannot be stopped.
Refer to
page 5–64
The width of the output frames or fields in pixels.
The progressive height of the output frames or fields in pixels.
The value of the R (or Y) color sample when the test pattern is a uniform color
background.
The value of the G (or Cb) color sample when the test pattern is a uniform color
background.
The value of the B (or Cr) color sample when the test pattern is a uniform color
background.
describes the Test Pattern Generator MegaCore function control register
“Generation of Avalon-ST Video Control Packets and Run-Time Control” on
“Generation of Avalon-ST Video Control Packets and Run-Time Control” on
for full details.
for full details.
(2)
(2)
(2)
Description
(1)
Video and Image Processing Suite User Guide
(1)
7–17