IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 194

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

7–14
Table 7–17. Scaler Control Register Map (Part 2 of 2)
Video and Image Processing Suite User Guide
4
5
6
7
8 to 7+N
8+N
9+N
8+N
v
9+N
Note to
(1) Value can be from 32 to the maximum specified in the parameter editor.
(2) If Share horizontal/vertical coefficients is selected in the parameter editor, this location is not used.
Address
h
h
h
h
+N
+N
to
Table
h
v
h
+N
7–17:
Horizontal Coefficient
Bank Write Address
Horizontal Coefficient
Bank Read Address
Vertical Coefficient Bank
Write Address
Vertical Coefficient Bank
Read Address
Horizontal Tap Data
Horizontal Phase
Vertical Tap Data
Vertical Phase
Table 7–18
data for an instance of the Scaler MegaCore function with four taps and eight phases.
Table 7–18. Example of Using the Scaler Control Registers (Part 1 of 2)
8
9
10
11
12
8
9
10
11
12
...
8
9
10
Address
Register
shows an example of the sequence of writes to the horizontal coefficient
0
128
0
0
0
–8
124
13
–1
1
...
–1
13
124
Value
Specifies which memory bank horizontal coefficient writes from the
Avalon-MM interface are made into.
Specifies which memory bank is used for horizontal coefficient reads
during data processing.
Specifies which memory bank vertical coefficient writes from the Avalon-
MM interface are made into.
Specifies which memory bank is used for vertical coefficient reads during
data processing
Specifies values for the horizontal coefficients at a particular phase. Write
these values first, then the Horizontal Phase to commit the write.
Specifies which phase the Horizontal Tap Data applies to. Writing to
this location, commits the writing of tap data. This write must be made
even if the phase value does not change between successive sets of tap
data.
Specifies values for the vertical coefficients at a particular phase. Write
these values first, then the Vertical Phase to commit the write.
Specifies which phase the Vertical Tap Data applies to. Writing to
this location, commits the writing of tap data. This write must be made
even if the phase value does not change between successive sets of tap
data.
Setting up Tap 0 for Phase 0.
Setting up Tap 1 for Phase 0.
Setting up Tap 2 for Phase 0.
Setting up Tap 3 for Phase 0.
Commit the writes to Phase 0.
Setting up Tap 0 for Phase 1.
Setting up Tap 1 for Phase 1.
Setting up Tap 2 for Phase 1.
Setting up Tap 3 for Phase 1.
Commit the writes to Phase 1.
...
Setting up Tap 0 for Phase 7.
Setting up Tap 1 for Phase 7.
Setting up Tap 2 for Phase 7.
(2)
(2)
Description
Purpose
Chapter 7: Control Register Maps
January 2011 Altera Corporation
(2)
Scaler