IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 68

RENEWAL Of IPS-VIDEO

IPSR-VIDEO

Manufacturer Part Number
IPSR-VIDEO
Description
RENEWAL Of IPS-VIDEO
Manufacturer
Altera
Series
IP Suitesr
Datasheet

Specifications of IPSR-VIDEO

Software Application
IP CORE, SUITES
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Features
Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
4–10
Video and Image Processing Suite User Guide
Ancillary Data Packets
Figure
packets, and how they are split into symbols.
Figure 4–8. Three Symbols in Parallel
Figure 4–9. Two Symbols in Parallel
Figure 4–10. One Symbol in Parallel
Ancillary data packets send ancillary packets between MegaCore functions. Ancillary
data packets are typically placed between a control data packet and a video data
packet and contain information that describes the video data packet, for example
active format description codes.
An ancillary data packet can contain one or more ancillary packets, each ancillary
packet starts with the code 0, 3FF, 3FF.
4–8,
Control data packet type identifier
(4 bits in least significant symbol,
Figure
Control data packet type identifier
(4 bits in least significant symbol,
X’s for unused symbols)
Control data packet type identifier
(4 bits in least significant symbol,
Control data, reference numbers to Table 4-5
Start
X’s for unused symbols)
Control data, reference numbers to Table 4-5
Start
X’s for unused symbols)
4–9, and
Start
15
X
15
X
X
2
1
15
Figure 4–10 on page 4–10
Control data, reference numbers to Table 4-5
3
2
1
4
3
1
6
5
4
6
5
2
9
8
7
8
7
3
X
9
4
End
Symbols in most significant bits
Symbols in middle significant bits
Symbols in least significant bits
5
End
Symbols in most significant bits
Symbols in least significant bits
6
show examples of control data
7
8
January 2011 Altera Corporation
9
Avalon-ST Video Protocol
End
Chapter 4: Interfaces

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