EVAL-ADAU1761Z Analog Devices Inc, EVAL-ADAU1761Z Datasheet - Page 34

• Manufacturer Part Number: EVAL-ADAU1761Z
• Description: Eval Board For ADAU1761
• Manufacturer: Analog Devices Inc
• Series: SigmaDSP®r

Specifications of EVAL-ADAU1761Z

• Main Purpose: Audio, CODEC
• Embedded: Yes, DSP
• Utilized Ic / Part: ADAU1761
• Primary Attributes: Stereo, 24-Bit, 8 ~ 96 kHz Sampling Rate, GUI Tool
• Secondary Attributes: I²C and GPIO Interfaces, 2 Differential and 1 Stereo Single-Ended Analog Inputs and Outputs
• Silicon Manufacturer: Analog Devices
• Core Architecture: SigmaDSP
• Silicon Core Number: ADAU1761
• Silicon Family Name: SigmaDSP
• Application Sub Type: Audio
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1761
Noise Gate Mode 2 (see Figure 42) is selected by setting the
NGTYP[1:0] bits to 10. In this mode, the ADAU1761 improves
the sound of the noise gate operation by first fading the PGA
gain over a period of about 100 ms to the minimum PGA gain
value. The ADAU1761 does not do a hard mute after the fade is
complete, so some small background noise will still exist.
ENABLE SIGNAL
NOISE GATE
INTERNAL
ANALOG
OUTPUT
DIGITAL
INPUT
MUTE
GAIN
Figure 42. Noise Gate Mode 2 (Analog Fade)
250ms
100ms
THRESHOLD
MIN GAIN
Rev. C | Page 34 of 92
Noise Gate Mode 3 (see Figure 43) is selected by setting the
NGTYP[1:0] bits to 11. This mode is the same as Mode 2 except
that at the end of the PGA fade gain interval, a digital mute is
performed. In general, this mode is the best-sounding mode,
because the audible effect of the digital hard mute is reduced by
the fact that the gain has already faded to a low level before the
mute occurs.
ENABLE SIGNAL
NOISE GATE
INTERNAL
ANALOG
OUTPUT
DIGITAL
INPUT
Figure 43. Noise Gate Mode 3 (Analog Fade/Digital Mute)
MUTE
GAIN
250ms
100ms
THRESHOLD
MIN GAIN