EVAL-ADAU1761Z Analog Devices Inc, EVAL-ADAU1761Z Datasheet - Page 64

• Manufacturer Part Number: EVAL-ADAU1761Z
• Description: Eval Board For ADAU1761
• Manufacturer: Analog Devices Inc
• Series: SigmaDSP®r

Specifications of EVAL-ADAU1761Z

• Main Purpose: Audio, CODEC
• Embedded: Yes, DSP
• Utilized Ic / Part: ADAU1761
• Primary Attributes: Stereo, 24-Bit, 8 ~ 96 kHz Sampling Rate, GUI Tool
• Secondary Attributes: I²C and GPIO Interfaces, 2 Differential and 1 Stereo Single-Ended Analog Inputs and Outputs
• Silicon Manufacturer: Analog Devices
• Core Architecture: SigmaDSP
• Silicon Core Number: ADAU1761
• Silicon Family Name: SigmaDSP
• Application Sub Type: Audio
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1761
R16: Serial Port Control 1, 16,406 (0x4016)
Bit 7
Table 50. Serial Port Control 1 Register
Bits
[7:5]
4
3
2
[1:0]
Bit Name
BPF[2:0]
ADTDM
DATDM
MSBP
LRDEL[1:0]
Bit 6
BPF[2:0]
Number of bit clock cycles per LRCLK audio frame.
Data delay from LRCLK edge (in BCLK units).
Description
Setting
000
001
010
011
100
101
110
111
ADC serial audio data channel position in TDM mode.
0 = left first (default).
1 = right first.
DAC serial audio data channel position in TDM mode.
0 = left first (default).
1 = right first.
MSB position in the LRCLK frame.
0 = MSB first (default).
1 = LSB first.
Setting
00
01
10
11
Bit 5
Bit 4
ADTDM
Bit Clock Cycles
64 (default)
Reserved
48
128
256
Reserved
Reserved
Reserved
Delay (Bit Clock Cycles)
1 (default)
0
8
16
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Bit 3
DATDM
Bit 2
MSBP
Bit 1
LRDEL[1:0]
Bit 0