LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 108

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

4-20
Register: 0x00 (0x80)
SCSI Control Zero (SCNTL0)
Read/Write
ARB[1:0]
Registers
7
1
ARB[1:0]
6
1
Arbitration Mode Bits 1 and 0
Simple Arbitration
1.
2.
3.
4.
ARB1
START
The LSI53C825A waits for a bus free condition to
occur.
It asserts SBSY/ and its SCSI ID (contained in the
SCSI Chip ID (SCID)
the SSEL/ signal is asserted by another SCSI
device, the LSI53C825A deasserts SBSY/,
deasserts its ID, and sets the Lost Arbitration bit
(bit 3) in the
After an arbitration delay, the CPU should read the
SCSI Bus Data Lines (SBDL)
higher priority SCSI ID is present. If no higher
priority ID bit is set, and the Lost Arbitration bit is not
set, the LSI53C825A has won arbitration.
Once the LSI53C825A has won arbitration, SSEL/
must be asserted using the
Latch (SOCL)
(1.2 s) before a low level selection can be
performed.
0
0
1
1
5
0
ARB0
WATN
0
1
0
1
4
0
SCSI Status Zero (SSTAT0)
for a bus clear plus a bus settle delay
Full arbitration, selection/reselection
EPC
3
0
register) onto the SCSI bus. If
Arbitration Mode
Simple arbitration
Reserved
Reserved
SCSI Output Control
R
2
x
register to check if a
AAP
1
0
register.
TRG
0
0
[7:6]