LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 151

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

31
0
0
0
0
0
0
0
Register: 0x27 (0xA7)
DMA Command (DCMD)
Read/Write
DCMD
Register: 0x28–0x2B (0xA8–0xAB)
DMA Next Address (DNAD)
Read/Write
DNAD
Operating Registers
0
7
x
0
0
0
0
x
DMA Command
This 8-bit register determines the instruction for the
LSI53C825A to execute. This register has a different
format for each instruction. For a complete description
see
DMA Next Address
This 32-bit register contains the general purpose address
pointer. At the start of some SCRIPTS operations, its
value is copied from the
(DSPS)
certain abort conditions. The default value of this register
is zero.
This register should not be used to determine data
addresses during a Phase Mismatch interrupt, as its
value is not always correct for this use. The
Counter
Pointer Save (DSPS)
calculate residual byte counts and addresses as
described in the Data Paths section in
tional Description.”
0
0
Chapter 5, “SCSI SCRIPTS Instruction Set.”
0
x
DNAD
register. Its value may not be valid except in
(DBC),
0
0
0
x
DMA FIFO
0
DCMD
0
registers should be used to
0
x
DMA SCRIPTS Pointer Save
0
(DFIFO), and
0
0
x
0
0
Chapter 2, “Func-
0
DMA SCRIPTS
x
0
DMA Byte
0
0
[31:0]
0
x
0
[7:0]
4-63
0
0