LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 65

no-image

LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
2.4.13.7 Sample Interrupt Service Routine
The following is a sample of an interrupt service routine for the
LSI53C825A. It can be repeated during polling or should be called when
the IRQ/ pin is asserted during hardware interrupts.
1. Read
2. If the INTF bit is set, it must be written to a one to clear this status.
3. If only the SIP bit is set, read
4. If only the DIP bit is set, read the
5. If both the SIP and DIP bits are set, read
6. When using polled interrupts, go back to Step 1 before leaving the
PCI Cache Mode
If the instruction is a JUMP/CALL WHEN/IF <phase>, the DSP is
updated to the transfer address before halting.
All other instructions may halt before completion.
SCSI Interrupt Status One (SIST1)
condition and get the SCSI interrupt status. The bits in the SIST0
and SIST1 tell which SCSI interrupts occurred and determine what
action is required to service the interrupts.
interrupt condition and get the DMA interrupt status. The bits in the
DSTAT tells which DMA interrupts occurred and determine what
action is required to service the interrupts.
(SIST0),
(DSTAT)
interrupt status. If using 8-bit reads of the
(SIST0),
(DSTAT)
the consecutive reads to ensure that the interrupts clear properly.
Both the SCSI and DMA interrupt conditions should be handled
before leaving the ISR. It is recommended that the DMA interrupt is
serviced before the SCSI interrupt, because a serious DMA interrupt
condition could influence how the SCSI interrupt is acted upon.
interrupt service routine, in case any stacked interrupts moved in
when the first interrupt was cleared. When using hardware interrupts,
the IRQ/ pin is asserted again if there are any stacked interrupts.
This should cause the system to re-enter the interrupt service
routine.
Interrupt Status
registers to clear interrupts, insert a 12 CLK delay between
SCSI Interrupt Status One
to clear the SCSI and DMA interrupt condition and get the
SCSI Interrupt Status One
(ISTAT).
SCSI Interrupt Status Zero (SIST0)
DMA Status (DSTAT)
to clear the SCSI interrupt
(SIST1), and
(SIST1), and
SCSI Interrupt Status Zero
SCSI Interrupt Status Zero
DMA Status
DMA Status
to clear the
and
2-41

Related parts for LSI53C825AJ