LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 188

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

5-4
The process repeats until the internally stored byte count has reached
zero. The LSI53C825A releases the PCI bus and then performs another
SCRIPTS instruction fetch cycle, using the incremented stored address
maintained in the
SCRIPTS instructions continues until an error condition occurs or an
interrupt SCRIPTS instruction is received. At this point, the LSI53C825A
interrupts the host CPU and waits for further servicing by the host
system. It can execute independent Block Move instructions specifying
new byte counts and starting locations in main memory. In this manner,
the LSI53C825A performs scatter/gather operations on data without
requiring help from the host program, generating a host interrupt, or
requiring an external DMA controller to be programmed. An overview of
this process is presented in
SCSI SCRIPTS Instruction Set
Loading the
LSI53C825A to fetch its first instruction at the address just loaded.
This is from main memory or the internal RAM, depending on the
address.
The LSI53C825A typically fetches two Dwords (64 bits) and decodes
the high-order byte of the first longword as a SCRIPTS instruction. If
the instruction is a Block Move, the lower three bytes of the first
longword are stored and interpreted as the number of bytes to be
moved. The second longword is stored and interpreted as the 32-bit
beginning address in main memory to which the move is directed.
For a SCSI send operation, the LSI53C825A waits until there is
enough space in the DMA FIFO to transfer a programmable size
block of data. For a SCSI receive operation, it waits until enough data
is collected in the DMA FIFO for transfer to memory. At this point,
the LSI53C825A requests use of the PCI bus again to transfer the
data.
When the LSI53C825A is granted the PCI bus, it executes (as a bus
master) a burst transfer (programmable size) of data, decrement the
internally stored remaining byte count, increment the address
pointer, and then releases the PCI bus. The LSI53C825A stays off
the PCI bus until the FIFO can again hold (for a write) or has
collected (for a read) enough data to repeat the process.
DMA SCRIPTS Pointer (DSP)
DMA SCRIPTS Pointer (DSP)
Figure
5.1.
register causes the
register. Execution of