LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 97

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

31
31
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Register: 0x0E
Header Type
Read Only
HT[7:0]
Register: 0x10
Base Address Zero (I/O)
Read/Write
BARZ
Register: 0x14
Base Address One (Memory)
Read/Write
BARO
Configuration Registers
x
x
7
0
x
x
x
x
x
x
x
x
0
Header Type
This register identifies the layout of bytes 0x10 through
0x3F in configuration space and also whether or not the
device contains multiple functions. The value of this
register is 0x00.
Base Address Register Zero (I/O)
This 32-bit register has bit zero hardwired to one. Bit 1 is
reserved and must return a zero on all reads, and the
other bits are used to map the device into I/O space.
Base Address Register One
This register has bit 0 hardwired to zero. For detailed
information on the operation of this register, refer to the
PCI Specification.
x
x
x
x
x
x
0
BARO
BARZ
x
x
x
x
x
x
0
x
x
HT
x
x
x
x
0
x
x
x
x
x
x
0
x
x
x
x
x
x
0
x
x
x
x
x
x
[31:0]
[31:0]
0
0
x
x
[7:0]
4-9
0
1
0
0